Roseville, Calif.- In order to address the sharp downturn in demand stemming from the global economic downturn, NEC Electronics Corporation today introduced plans to trim 80.0 billion yen in fixed costs over the next two years.
The company will implement the following measures: (1) Reduce its temporary workforce by 1,200, and implement new work schedules and furloughs at its manufacturing facilities in Japan, (2) decrease personnel costs, including remuneration for corporate officers, (3) close the 6-inch wafer line at NEC Electronics America’s Roseville facility by the end of March 2010, and (4) reduce research and development (R&D) costs.
These new measures, in combination with on-going efforts such as the realignment of manufacturing facilities in Japan, are expected to reduce fixed costs by 60.0 billion yen in the fiscal year ending March 31, 2010 and 20.0 billion yen in the fiscal year ending March 31, 2011. Based on these fixed-cost reductions, the company plans to reduce capital expenditures and R&D spending by 20.0 billion each compared to the current fiscal year.
Details of the new measures are as follows:
1) Reduce temporary workforce by 1,200, and implement new work schedules and furloughs at manufacturing facilities in Japan
NEC Electronics will eliminate 1,200 of its 1,400* temporary positions within NEC Electronics Corporation and its manufacturing facilities in Japan by March 31, 2009. In addition, it will adjust work schedules to maximize efficiency of manufacturing costs, and implement furloughs of up to 10 days at various manufacturing facilities in Japan from now through March 2009.
(* Data as of September 2008)
2) Decrease personnel costs, including remuneration for corporate officers
NEC Electronics will reduce the remuneration of corporate officers by as much as 30 percent from January 2009 to March 2010. The company will also reduce the salaries of employees in managerial positions by as much as 7 percent from February 2009 to March 2010.
3) Close the 6-inch wafer line at Roseville by the end of March 2010
NEC Electronics closed the 8-inch wafer line at NEC Semiconductors Yamagata and 300mm pilot line at Sagamihara in November and December of 2008, respectively. Today, the company announced that it will accelerate the closure of the 6-inch wafer line at NEC Semiconductors Kyushu Yamaguchi’s Kawashiri facility by six months, to the end of March 2010, and close the 6-inch wafer line at NEC Electronics America’s facility in Roseville, California by the end of March 2010. In addition to these closures, NEC Electronics is considering selling the 6-inch wafer line at Shougang NEC Electronics in the first half of the next fiscal year.
4) Reduce research and development (R&D) costs
To reduce R&D costs, the company will eliminate development of products that have become less profitable as a result of the changing business environment, improve efficiency by standardizing development processes such as the sharing of design assets, and expand of its reliance on low-cost overseas development sites in India and other countries. Because of these measures, the company anticipates an approximately 20.0 billion yen reduction in R&D costs compared to the current fiscal year.
NEC Electronics believes the faithful implementation of these new measures will fortify the company to weather difficult market conditions, and enable it to achieve solid profits when the financial crisis passes and demand once again increases.
